IEEE C37.26-2003 pdf download

IEEE C37.26-2003 pdf download

IEEE C37.26-2003 pdf download.IEEE Guide for Methods of Power Factor Measurement for Low-Voltage Inductive Test Circuits
1.2 Purpose
The purpose of this guide is to recommend methods of measuring the power factor for inductive test circuits, so that the preferred method giving the greatest accuracy is recommended for any particular circuit.
1.3 Alternative methods
The methods in this guide are preferred. Alternatively, other methods (including use of computerized or dig- ital techniques) may be used, but the method used must have been validated as producing results equivalent to those obtained using the methods in this guide.
2. References
This guide shall be used in conjunction with the following publication. When the standard referenced in this document is superseded by an approved revision, the revision shall apply. IEEE Std C37.100 ™ -1992 (Reaff 2001), IEEE Standard Definitions for Power Switchgear.
3. Definitions
The definitions and terms contained in this guide or in other ANSI or IEEE standards referred to in this guide are not intended to embrace all legitimate meanings of the terms. They are applicable only to the sub- ject treated in this guide. For definitions of terms used in this guide, refer to IEEE C37.100-1992.
4. Ratio method
4.1 General Devices such as current-limiting fuses, fused circuit breakers, and similar fast clearing devices may have total interrupting times of 0.5 cycle or less. The ratio method permits measurement to be made within the operating time of these devices. The ratio method is generally not suitable for use on test circuits with a power factor above 30%. Since this method requires closing the test circuit to produce the maximum current asymmetry, the resulting high electrical loading and mechanical forces on the bus supports and circuit components may jeopardize the test plant equipment. In such cases, the test laboratory may request to determine the power factor of the test circuit using a reduced current level (such as 50% of the rated test current), with the agreement of the manu- facturer and the witnessing test inspector.
4.2 Procedures for determining power factor
The power factor of the test circuit is determined at an instant of time one-half cycle (based on the fundamental frequency timing wave) after the initiation of the test current flow by determining the symmetrical and asymmetrical (total) currents at this point of time (see Figure 1, Figure 2, and Table 2). Both the rms symmetrical current and the total rms asymmetrical current are to be measured and the ratio M A (for  hreephase test circuits) or M M (for single-phase test circuits) calculated as follows:
1) Construct the envelope of the test current wave as shown in Figure 1.
2) Construct a vertical line at the one-half cycle time after the initiation of the test current.
3) Measure the deflection of the trace from the zero line to the maximum point of the envelope at the one-half cycle line (this is the value shown as A’).
4) Measure the deflection of the trace from the zero line to the minimum point of the envelope at the one-half cycle line (this is the value shown as B’).
5) Calculate the value for the rms symmetrical current, I, using Equation (1).
6) Calculate the value for the rms asymmetrical current, I ‘, using Equation (2).
5. DC decrement method
5.1 General
This method is recommended for test circuits with a power factor of 30% or less, where the device to be tested interrupts at a point in time more than one-half cycle after the initiation of the test current. This method relates the power factor to the rate of decay of the dc component of test current. The current measur- ing method used should not introduce distortion into the dc component of current. The use of noninductive current measuring shunts is recommended, as current transformers may introduce significant errors into the measurements unless additional precautions are taken.
5.2 Procedure for determining power factor
The power factor may be determined from the curve of the dc component of the asymmetrical test current wave. See Figure 3.IEEE C37.26 pdf download.IEEE C37.26-2003 pdf download

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